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The minimum number of transistors required to implement a two input AND gate is

The minimum number of transistors required to implement a two input AND gate is

  1. 2
  2. 4
  3. 6
  4. 8
discuss
Using DeMorgan’s Theorem we can convert any AND-OR structure into

Using DeMorgan’s Theorem we can convert any AND-OR structure into

  1. NAND-NAND
  2. OR-NAND
  3. NAND-NOR
  4. NOR-NAND
discuss
For a memory with a 16-bit address space, the addressability is

For a memory with a 16-bit address space, the addressability is

  1. 16 bits
  2. 8 bits
  3. 2^16 bits
  4. Cannot be determined
discuss
Because we wish to allow each ASCII code to occupy one location in memory, most memories are_____ addressable

Because we wish to allow each ASCII code to occupy one location in memory, most memories are_____ addressable.

  1. BYTE
  2. NIBBLE
  3. WORD (16 bits)
  4. DOUBLEWORD (32 bits)
discuss
Circuit A is a 1-bit adder; circuit B is a 1 bit multiplier. (Hint: Construct the truth table for the adder and the multiplier)

Circuit A is a 1-bit adder; circuit B is a 1 bit multiplier. (Hint: Construct the truth table for the adder and the multiplier)

  1. Circuit A has more gates than circuit B
  2. Circuit B has more gates than circuit A
  3. Circuit A has the same number of gates as circuit B
  4. none
discuss
When the write enable input is not asserted, the gated D latch ______ its output

When the write enable input is not asserted, the gated D latch ______ its output

  1. can not change
  2. clears
  3. sets
  4. complements
discuss
A structure that stores a number of bits taken “together as a unit” is a

A structure that stores a number of bits taken “together as a unit” is a

  1. gate
  2. mux
  3. decoder
  4. register
discuss
We say that a set of gates is logically complete if we can build any circuit without using any otherkind of gates. Which of the following sets are logically complete

We say that a set of gates is logically complete if we can build any circuit without using any otherkind of gates. Which of the following sets are logically complete

  1. set of {AND,OR}
  2. set of {EXOR, NOT}
  3. set of {AND,OR,NOT}
  4. None of the above
discuss
Of the following circuits, the one which involves storage is

Of the following circuits, the one which involves storage is

  1. RS Latch
  2. mux
  3. nand
  4. decoder
discuss
If m is a power of 2, the number of select lines required for an m-input mux is:

If m is a power of 2, the number of select lines required for an m-input mux is:

  1. m
  2. 2^m
  3. log2 (m)
  4. 2*m
discuss
For the number A[15:0] = 0110110010001111, A[14:13] is ______ A[3:2]

For the number A[15:0] = 0110110010001111, A[14:13] is ______ A[3:2].

  1. less than
  2. greater than
  3. the same as
  4. cannot be determined
discuss
Which of the following conditions is not allowed in an RS latch?

Which of the following conditions is not allowed in an RS latch?

  1. R is asserted, S is asserted
  2. R is asserted, S is negated
  3. R is negated, S is asserted
  4. R is negated, S is negated
discuss
Which of the following pair of gates can form a latch?

Which of the following pair of gates can form a latch?

  1. a pair of cross coupled OR
  2. a pair of cross copled AND
  3. a pair of cross coupled NAND
  4. a cross coupled NAND/OR
discuss
‘Burst refresh’ in DRAM is also called

‘Burst refresh’ in DRAM is also called

  1. Concentrated refresh
  2. Distributed refresh
  3. Hidden refresh
  4. None of the above
discuss
The number of interrupt lines in 8085 is

The number of interrupt lines in 8085 is

  1. 2
  2. 3
  3. 4
  4. 5
discuss
A real number consists of

A real number consists of

  1. integer part
  2. integer part and fraction part
  3. integer part, fraction part along with positive or negative sign
  4. none of the above
discuss
Assertion (A): Negative values of incremental operator in DO loop are allowed in Fortran 77 but not in earlier versions of Fortran. Reason (R): Fortran 77 has better array facilities than earlier versions of Fortran

Assertion (A): Negative values of incremental operator in DO loop are allowed in Fortran 77 but not in earlier versions of Fortran. Reason (R): Fortran 77 has better array facilities than earlier versions of Fortran.

  1. Both A and R are correct and R is correct explanation of A
  2. Both A and R are correct but R is not correct explanation of A
  3. A is correct R is wrong
  4. A is wrong R is correct
discuss
Which of the following is not treated as hexadecimal constant by assembler in 8085?

Which of the following is not treated as hexadecimal constant by assembler in 8085?

  1. 45 H
  2. 6 AFH
  3. 234
  4. 64 H
discuss
IC 7485 cannot be cascadeD

IC 7485 cannot be cascadeD.

  1. True
  2. False
  3. none
  4. none
discuss
An I/O processor controls the flow of information between

An I/O processor controls the flow of information between

  1. cache memory and I/O devices
  2. main memory and I/O devices
  3. two I/O devices
  4. cache and main memory
discuss
total MCQs: 145

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